Overview: Introduction to verification, Developing Verification strategies, Applying Verification strategies, E-standard Programming Constructs, RTL ports and interfaces, Modeling hardware interfaces with concurrency constructs, simulating testbenches using Fork-join, stimulus synchronization using conventional synchronization constructs like Mailboxes, Semaphores, regions and events.
Hardware Verification Languages: Fundamentals of HVLs, concurrency Issues, Class definitions and instantiations, tasks and functions, Concurrent techniques, Automatic Stimulus generation and randomized testing using HVLs, Building Transactors and Stubs, Result checking, Coverage and Regression, Debuggng
Advanced Functional Verification: RTL verification; Processor verification issues, functional verification using constraint modelling.
Basics of Formal Verification: Property Checking. Comparision with simulation based technique; Decision Diagrams, Use of CUDD
Summary: In this course we shall learn the following:
1. Verification Aims and Techniques
2. Simulation based verification
3. How to use Langauge e?
4. Basics of Formal Verification
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