Completed PhD

S.No Photo Thesis Title E-mail Id Current Position
1 K. Najeeb, Peak Dynamic Power Issues in Digital Circuit Design, 2007. k.najeeb@gmail.com Assistant Professor
2 R. Manimegalai, Efficient Logic Synthesis and Placement for modern FPGA architectures, 2007. mmegalai@yahoo.com Professor
3 V. R. Devanathan, On Power Safe Testing of System-on-Chips, 2007. vrd@ti.com
4 Noor Mahammad, Novel Fault Tolerant Reconfigurable Architectures, 2009. noorse@gmail.com Visiting Assistant Professor
5 Kavish Seth, Efficient Motion Vector Recovery and Motion Estimation Schemes for H.264 Coded Video Streams, (Jointly with Prof. S. Srinivasan, Dept. of Elec. Engg.), 2011. kavish@atheras.com
6 K. Shyamala, Mapping issues in FPGA CAD flow. prkshyamala@gmail.com
7 S. Srinivasan, Novel VLSI design methodologies for emerging application domains. srinis@iitm.ac.in
8 Seetal Potluri, Power: Its Manifestations in Digital Systems Testing potluri6@gmail.com
9 M. J. Shankaraman, Green Communication, Power-aware methodologies for the Internet (Jointly with Dr. Gaurav Raina, Dept. of Elec. Eng.), 2016. mjsraman@gmail.com
10 Neel Gala, Emerging Computing Techniques for Low Power Error Resilient Design, 2016. Bio Page
neelgala@gmail.com