George Kurien, V. V. Narayana Rao, Virendra Patidhar, V. Kamakoti and Srivaths Ravi, "An integrated SCR and TVR Technique for shift power reduction on Linear and Double-Tree Scan architectures", Journal of Low Power Electronics, Vol. 5, 58-68, 2009.
Kunal K., George K., Satya Gautam and V. Kamakoti, "HTM Design Spaces: Complete Decoupling From Caches and Achieving Highly Concurrent Transactions", ACM SIGOPS Operating Systems Review, Vol. 43 (2), 98-99, 2009
SK Noor Mahammad, and V Kamakoti, "Constructing Online Testable Circuits using Reversible Logic", To appear in IEEE Transactions on Instrumentation and Measurements.
Lavanya Jagan, Ratan Deep Singh, V. Kamakoti and Ananth Majhi, "Efficient Grouping of Fail Chips for Volume Yield Diagnostics", To appear in 22nd International Conference on VLSI Design, 2009.
Vasanth Ramesh, Akanksha Jain, V. Kamakoti and Vivekananda Vedula, "Prime Numbers are High Coverage Test Vectors!", To appear in Proc. of 13th IEEE Intl. VLSI Design and Test Symposium (VDAT'09).
L. Srivani, V. Kamakoti and S. Ilango Sambasivan, "Constructing Synthetic Benchmark Circuits to Stress Test FPGAs", To appear in Proc. of 13th IEEE Intl. VLSI Design and Test Symposium (VDAT'09).
K. Shyamala, M. Shoaib and V. Kamakoti, "Peak Dynamic Power Estimation of FPGA-mapped Digital Designs", To appear in Proc. of 13th IEEE Intl. VLSI Design and Test Symposium (VDAT'09).
Kavish Seth, Muralidhar Kommisetty, Vamshi Anand, V. Kamakoti and S. Srinivasan, "VLSI Implementation of Motion Vector Recovery Algorithms for H.264 Based Video Codecs", To appear in Proc. of 13th IEEE Intl. VLSI Design and Test Symposium (VDAT'09).
N. Ramasubramanian, P. Krishnan, and V. Kamakoti, "Studies on the Performance of Two New Bus Arbitration Schemes for MultiCore Processors", IEEE International Advance Computing Conference (IACC), 2009, pp. 1192-1196.
Kate, K. and Ravindran, B. (2009) "Epsilon Equitable Partition: A Positional Analysis Method for Large Social Networks". In the Proceedings of 15th International Conference on Management of Data (COMAD 2009). Abstract PDF
Shivashankar, S., Ravindran, B., and Srinivasa Raghavan, N. R. (2009) "Text mining of Internet content: The bridge connecting product research with customers in the digital era". In Product Research: The Art and Science Behind Successful Product Launches, Srinivasa Raghavan, N.R. and Cafeo, J. A. (Eds.), pp. 231-242, Nov. 2009. Springer. (Book Chapter).
Mohamed, M., Chakravarthy, V. S., Subramanian, D., Ravindran, B. (2009) "The Role of Basal Ganglia in Performing Simple Reaching Movements: A Computational Model". To appear in the Proceedings of the 14th Conference of the International Graphonomics Society (IGS09).
Bahuguna, J., Ravindran, B. and Krishna, K. M. (2009) "MDP based Active Localization for Multiple Robots". To appear in the Proceedings of the Fifth Annual IEEE Conference on Automation Science and Engineering (CASE 2009).
Malpani, A., Ravindran, B., and Murthy, H. A. (2009) "Personalized Intelligent Tutoring System Using Reinforcement Learning". Presented at the Multidisciplinary Symposium on Reinforcement Learning.
Mohamed, M., Chakravarthy, V. S., Subramanian, D., Ravindran, B. (2009) "The Role of Basal Ganglia in Performing Simple Reaching Movements: A Computational Model". Presented at the Multidisciplinary Symposium on Reinforcement Learning. (Shorter version of the paper at IGS09.)
Saravanan, M., Ravindran, B., and Raman, S. (2009) "Improving Legal Information Retrieval Using Ontological Framework". Artificial Intelligence and Law, Online 14-May-2009. Springer.
Madhu Mutyam, F. Wang, K. Ramakrishnan, N. Vijaykrishnan, M. Kandemir, Y. Xie, M.J. Irwin. Process variation aware adaptive cache architecture and management. IEEE Transactions on Computers, 58(7):865-877, July 2009.
Madhu Mutyam. Selective shielding technique to eliminate crosstalk transitions. ACM Transactions on Design Automation of Electronic Systems, 14(3), Article No. 43, 20 pages, May 2009. (Preliminary version is published in the IEEE/ACM International Conference on Computer-Aided Design, pp. 618-621, 2007.)
R.I.S.E Group is a research group in the CSE Dept. of IIT Madras working in the areas of Computer Architecure, Secure Systems, Machine Learning and VLSI Design.
If you wish to collaborate with us, please contact Prof. V Kamakoti (firstname.lastname@example.org) for details.